This invention relates to logic circuits such as NOR and NAND gates for producing an output signal responsive to a plurality of input signals.
Referring now to FIG. 1, there is shown a prior art NOR circuit having four inputs. N-channel enhancement type MOSFETs Q1, Q2, Q3 and Q4 are connected in parallel between an output terminal and a ground terminal. The gate electrodes of MOSFETs Q1, Q2, Q3 and Q4 are connected to input terminals IN1, IN2, IN3 and IN4 respectively. A load element 2 is connected between a power supply terminal V.sub.DD and the output terminal and usually consists of a resistor or a MOSFET, the gate and source electrodes of which are connected to each other. Note that even though only one of MOSFETs Q1 through Q4 becomes conductive, a current path between the power supply and ground terminals is formed and current flows through the path. Power consumption of such a NOR circuit with a load element is very large.
Referring to FIG. 2, there is shown another prior art NOR circuit of complementary MOSFETs (CMOS FETs). N-channel enhancement type MOSFETs Q1 through Q4 are connected in parallel between the output terminal and the ground terminal. P-channel enhancement type MOSFETs Q5, Q6, Q7 and Q8 are connected in series between the power supply terminal and the output terminal. MOSFETs Q1 and Q5, Q2 and Q6, Q3 and Q7 and Q4 and Q8 are connected to input terminals IN1, IN2, IN3 and IN4 through the gate electrodes respectively. When MOSFET Q1 is conductive, MOSFET Q5 is not conductive and no current path between the power supply terminal and the ground-terminal is formed. In this way, power consumption of the NOR circuit of CMOSFETs is very small. However, the number of transistors in such a circuit is twice that of input terminals. This results in complex wiring and a larger area than that of a NOR circuit which uses a load element. Moreover, when the logic level of the output signal responsive to input signals changes to a logic "1", the voltage of the power supply terminal is transmitted through MOSFETs Q5, Q6, Q7 and Q8. Therefore it takes longer to change its output to a logic "1" than a circuit with a load element.